This site explains the various concepts like divide by n clocks, FIFO, I2C etc. The blog provides the concepts, then the Verilog code and explanation. Finally, the simulation of the code and waveform. The blog also provides simple test cases to run and test the Verilog code.
The synthesis and the simulation are done by the open-source tools. The installation of the tool is also given in detail as blog posts.
QFLOW: Synthesis tool.
Iverilog: Simulation for the Verilog code
Fifo: First In First Out concept and Verilog code
Divide by n clocks: Clock divider concept and various methods to derive dividers like divide by 3, divide by 4, divide by 5 etc.
CRPR: Clock Reconvergence Pessimism Removal
Lockup Latches: Use of lockup latches and their functionality in timing
Clock domain crossing verification: the post describes the strategy for the verification of clock domain crossing
SPI Protocol: The blog gives details about the SPI protocol basics
Sequence detector: The blog gives the details about the sequence pattern detection
UART Protocol: The blog provides the basics of UART Protocol.
APB Protocol: The blog describes the APB Protocol works.
CDC Issues: The blog covers various issues and solutions related to clock domain crossing
Car Parking: This blog post covers the basic car parking FSM system.
FSM: the blog posts describe the various features of the Finite State Machine.
Multi-cycle path constraints: This blog covers the timing analysis (setup and hold constraints) by the set_multicycle_path constraints applied to a path.
Pulse Generator: This blog post covers the pulse generation logic in Verilog.
Clock Gating: This post describes various designs of clock gating in Verilog.
ASIC Design Flow: The post describes the various stages in ASIC design flow.
Non-Constant reset values for Registers: The post describes the methods for having non-constant reset values for registers.
wide2narrow data transmission: The post describes the logic for wide2narrow data transmission
narrow2wide data transmission: The blog describes the logic for narrow2wide data transmission
Round Robin: The blog describes round robin algorithm
Fibonacci: the blog post describes the Fibonacci Sequence generator